Cadence: - $1.2 MM for 20 seats - plus maintenance Avante: Cadence competitor 1. Simulation is done before the chip is built 2. build 3. Characterization Verification - does chip meet criterion of certain standards 4. Validation (find out where it breaks) is done in the lab Sam: - hard to sell tools into companies - EE Times - standard Acrobat model: - viewer is free - authoring tool is not Revenue Angles: - offering authoring - offer lease time on server farms for simulations - reduce communication/chip-design costs - reduce desktop footprint/overhead - turn Google into a component search engine (display counter for component mfgers)